Search - alu verilog

[Other resource] signal_cpu_sort

Description: Use the verilog language write a MIPS CPU code, and have additional instruction, for example: selection sort instruction. The code has contain combination circuit and sequenial circuit. CPU have contain ALU, ADD, ALU_CONTROL, DATA_MEMORY, INST_MEMORY, REGISTER, PC, and TESTBRANCH.-Use the verilog language write a MIPS CPU code, and have additional instruction, for example: selection sort instruction. The code has contain combination circuit and sequenial circuit. CPU have contain ALU, ADD, ALU_CONTROL, DATA_MEMORY, INST_MEMORY, REGISTER, PC, and TESTBRANCH.
Platform: | Size: 8960 | Author: 張大小 | Hits:

[Other resource] latch

Description: 门拴电路,4位选择器，alu,用verilog写的。-doors Shuan circuit, four selectors, ALU, with Verilog writes.
Platform: | Size: 1373 | Author: 杨艳 | Hits:

[Other resource] alu3

Description: 用verilog语言编写，一个8-bit ALU，可以完成按字节的+、-和与、或、非操作
Platform: | Size: 203554 | Author: 徐芬 | Hits:

[Other resource] CPU

Description: 使用verilog作为CPU设计语言实现单数据通路五级流水线的CPU。具有32个通用寄存器、一个程序计数器PC、一个标志寄存器FLAG，一个堆栈寄存器STACK。存储器寻址粒度为字节。数据存储以32位字对准。采用32位定长指令格式，采用Load/Store结构，ALU指令采用三地址格式。支持有符号和无符号整数加、减、乘、除运算，并支持浮点数加、减、乘、除四种运算，支持与、或、异或、非4种逻辑运算，支持逻辑左移、逻辑右移、算术右移、循环右移4种移位运算，支持Load/Store操作，支持地址/立即数加载操作，支持无条件转移和为0转移、非0转移、无符号>转移、无符号<转移、有符号>转移、有符号<转移等条件转移。
Platform: | Size: 43474 | Author: haotianr | Hits:

[Other resource] ALU_verilog

Description: 用verilog语言编写的4位算术逻辑单元ALU,功能参考74181，包含.v文件以及测试用.vwf文件
Platform: | Size: 2438 | Author: 颜心馨 | Hits:

[VHDL-FPGA-Verilog] VHDL的基本数学运算库

Description: VHDL的基本数学运算库,非常好用-VHDL basic arithmetic library, a very handy! !
Platform: | Size: 232448 | Author: | Hits:

[VHDL-FPGA-Verilog] latch

Description: 门拴电路,4位选择器，alu,用verilog写的。-doors Shuan circuit, four selectors, ALU, with Verilog writes.
Platform: | Size: 1024 | Author: 杨艳 | Hits:

[VHDL-FPGA-Verilog] alu_32_bit

Description: 用Verilog编写的32位ALU（运算器），具有与、或逻辑运算；加、减算术运算；小于置一，零检测，以及溢出检测等功能。其中加法运算是采用了快速进位链-32bitALU
Platform: | Size: 2048 | Author: zhyan | Hits:

[Other] alu

Description: 用Verilog HDL编写的简单算数逻辑单元-Algorithm Logic Unit programmed by Verilog HDl
Platform: | Size: 44032 | Author: 张娜 | Hits:

[Other] alu

Description: 用Verilog语言中的always块实现对输入数据执行加、减、与、或和求反的功能-Using Verilog language always realize the input data block to perform addition, subtraction, AND, OR, and negated function
Platform: | Size: 1024 | Author: 坚果墙 | Hits:

[VHDL-FPGA-Verilog] ALU

Description: 用verilog寫成的ALU，有簡易的加減乘除、shifting、logic gate等功能。-Written by verilog ALU, there is a simple addition, subtraction, shifting, logic gate functions.
Platform: | Size: 241664 | Author: Liu Ching An | Hits:

[VHDL-FPGA-Verilog] CPU_Verilog

Description: 此代码完成了流水线CPU的设计。其中有ALU，控制模块，UART等verilog代码。(This code completes the design of pipelined CPU)
Platform: | Size: 12288 | Author: fairchildfzc | Hits:

[VHDL-FPGA-Verilog] ALU_4bit

Description: 4-bit ALU in verilog
Platform: | Size: 457728 | Author: khang7 | Hits:

[VHDL-FPGA-Verilog] 各种基础module打包下载全集

Description: 例如分频器，alu，ram的verilog实现(The implementation of divider, alu, ram etc. in verilog)
Platform: | Size: 7168 | Author: Harrypotterrrr | Hits:

[Other] alu_shifter

Description: alu and shifter verilog code as text file
Platform: | Size: 2048 | Author: queenjames | Hits:

[Other] MyALU1

Description: 一个关于寄存器的ALU功能，并能进行寄存器间的相互转化。(ALU REGISTER. THEY CAN TRANSLATE TO EACH OTHER.)
Platform: | Size: 397312 | Author: lueluelue | Hits:

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[Other resource] signal_cpu_sort

[Other resource] latch

[Other resource] alu3

[Other resource] CPU

[Other resource] ALU_verilog

[VHDL-FPGA-Verilog] VHDL的基本数学运算库

[VHDL-FPGA-Verilog] latch

[VHDL-FPGA-Verilog] alu_32_bit

[Other] alu

[Other] alu

[VHDL-FPGA-Verilog] ALU

[VHDL-FPGA-Verilog] CPU_Verilog

[VHDL-FPGA-Verilog] ALU_4bit

[VHDL-FPGA-Verilog] 各种基础module打包下载全集

[Other] alu_shifter

[Other] MyALU1

[VHDL-FPGA-Verilog] ALU32

[VHDL-FPGA-Verilog] ALU ALU

[VHDL-FPGA-Verilog] RISC

[VHDL-FPGA-Verilog] Verilog for simple alu

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